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Virtual memory(a) How is a virtual address mapped to a physical address using a page table? Draw a diagram to help explain it.(b) What does the system do if there is a page fault?(c) When the TLB is hit, is it guaranteed that the processor can find the data in main memory? Why?(d) If there is a cache, is it possible that the TLB hits while the cache misses? Why?
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SOLVED:[M] In a computer with a virtual-memory system, the execution of an instruction may be interrupted by a page fault. What state information has to be saved so that this instruction can be resumed later? Note that bringing a new page into the main memory involves a DMA transfer, which requires execution of other instructions. Is it simpler to abandon the interrupted instruction and completely re-execute it later? Can this be done?
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