Jan 6, 2021 · Here we demonstrate a computationally specific integrated photonic hardware accelerator (tensor core) that is capable of operating at speeds of trillions of multiply …

While we focus on convolution processing, more generally our results indicate the major potential of integrated photonics for parallel, fast, and efficient computational hardware in demanding AI …

Feb 1, 2020 · Given recent advances in hybrid integration of soliton microcombs at microwave line rates, ultra-low loss silicon nitride waveguides, and high speed on-chip detectors and …

Here we demonstrate a computationally specific integrated photonic hardware accelerator (tensor core) that is capable of operating at speeds of trillions of multiply-accumulate operations per...

Oct 30, 2024 · This work introduces a diffraction-driven multi-kernel optical convolution unit (MOCU) for on-chip parallel convolution processing. Utilizing cascaded silica 1D metalines as …

Jun 22, 2024 · We experimentally demonstrate the application of our designed metasurface by using it as the optical convolutional layer of a CNN for MNIST digit classification. The …

Feb 1, 2020 · Given recent advances in hybrid integration of soliton microcombs at microwave line rates, ultra-low loss silicon nitride waveguides, and high speed on-chip detectors and …

Here we demonstrate a computationally specific integrated photonic hardware accelerator (tensor core) that is capable of operating at speeds of trillions of multiply-accumulate operations per …

Nov 30, 2023 · Given recent advances in hybrid integration of soliton microcombs at microwave line rates, ultra-low loss silicon nitride waveguides, and high speed on-chip detectors and …

parallel data transfer through wavelength division multiplexing (WDM) in conjunction with multichannel sources (i.e. optical frequency combs); and (2) extremely high data modulation …