Abstract: This paper presents the design of a dynamic reconfigurable processor using an array of two dimensional logarithmic numbering system (LNS) processing elements and registers. By programming ...

With the effective use of the storage element, the electrolytic capacitor placed at the ... Recently, a promising APD topology has been reported, offering a lesser number of switches, as well as ...

College of Civil Engineering and Architecture, Zhejiang University, Hangzhou 310000, P. R. China The Architectural Design & Research Institute of Zhejiang University Co., Ltd., Hangzhou, 310000, P.R.