This behavioral model was then sent to PROSILOG. The code could not be synthesized as is, and had to be adapted in order to produce a synthesizable RTL model. Modeling style for the behavioral model ...

Parag Goel & Sakshi Bajaj, Applied Micro Circuits Corp. EETimes (8/23/2010 4:30 AM EDT) With the advent of a new era in verification technology based on an advanced HVL like System Verilog, the ...