Yingren has just announced their new YRS820 Gen5 SSD controller, which is based on the RISC-V architecture, offers 14GB/sec+ reads, and it's done with a fanless design.

The RISC V-based YRS820 controller could be an enticing alternative for consumer SSD manufacturers, but Yingren and other smaller companies are arriving somewhat late to the PCIe 5 game.

The AndesCore™ N25F is a 32-bit CPU IP core based on the AndeStar™ V5 architecture, which extends but is compatible to the RISC-V architecture. With an optimized 5-stage pipeline design, it ...

The open standard even provides some competition to Arm architecture in the SSD controller business, with significantly better results, according to Chinese manufacturer Yingren Technology.

InnoGrit Advances with Mass Production of YRS820 PCIe 5.0 Controller Featuring RISC-V Architecture Published 9 months ago by Hilbert Hagedoorn News Comments ...

Alibaba has launched its first server-grade RISC-V processor, the C930, designed for high-performance computing and positioned as an alternative to Intel Xeon and AMD EPYC CPUs.

What’s going on? RISC-V is an architecture specification that can be implemented at many levels from a simple microcontroller or even a pile of 74 logic to a full-fat application processor.

Google wants RISC-V to be a “tier-1” Android architecture Google's keynote at the RISC-V Summit promises official, polished support.

The SiSpeed Lichee Console 4 A RISC-V Cyberdeck represents an exciting step forward in the world of processor architecture.

Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit Out-of-Order processors with DSP, FPU, Vector, ...

The AndesCore™ N25F is a 32-bit CPU IP core based on the AndeStar™ V5 architecture, which extends but is compatible to the RISC-V architecture. With an optimized 5-stage pipeline design, it ...