Abstract: Today's modern market needs application computational blocks to execute complex operations with an ease to satisfy low power requirements ... this paper the Vedic multiplier circuit is ...

This is Low Power Circuits & IoT Systems Group of Indian Institiute of Technology (IIT) Gandhinagar. The group is lead by Prof. Madhav K Pathak. Power management integrated circuit (PMIC) design.

Abstract: Power dissipation ... the suggested GDI-based MBFF has the lowest PDP. The number of transistors needed to create an MBFF is lowered in PTL compared to others. T-SPICE is used to simulate ...