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Figure -01 HALF ADDER. Half Subtractor. The half-subtractor is a combinational circuit which is used to perform subtraction of two bits. It has two inputs, X (minuend) and Y (subtrahend) and two ...
The half-subtractor needs two outputs. One output generates the difference and will be designated by the symbol D. The second output, designated B for borrow, generates the binary signal that informs ...
This paper proposes a novel circuit design of two Ternary Half Subtractor (THS) and a Ternary Full Subtractor (TFS) using Double pass transistor logic (DPL). The proposed THS is implemented by using ...