G.Skill has introduced a pair of new DDR5 memory timing variants featuring the lowest set of primary timings the DRAM manufacturer ... a DDR5-6000 CL26-36-36-96 configuration in 32GB and 64GB ...

The Controller IP Cores support x8/x16/x32 DRAM data bus configuration. The DDR controller will convert the internal request to DRAM chip protocol for data read/write, it supports Multi-Ranks DRAM ...