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IEEE17h
A new approach for obtaining all logic gates using Chua's circuit with fixed input/output levels - IEEE Xplore
This paper presents a universal logic gate to perform all logic functions, namely, AND, OR, NAND, NOR, and XOR operations without changing the circuit topology. The basic advantage behind our scheme ...
IEEE3d
Top-Gate CVD WSe2 pFETs with Record-High Id~594 μA/μm, Gm~244 μS/μm and WSe2/MoS2 CFET based Half-adder Circuit Using Monolithic 3D Integration - IEEE Xplore
Top-Gate CVD WSe 2 pFETs with Record-High I d ~594 μA/μm, G m ~244 μS/μm and WSe 2 /MoS 2 CFET based Half-adder Circuit Using Monolithic 3D Integration Abstract: Monolithic integration of ...