Parallel adder is a digital circuit capable of finding the arithmetic sum of two binary numbers that is greater than one bit in length by operating on corresponding pairs of bits in parallel. It ...

In this paper, we have proposed a design technique for the reversible circuit of binary coded decimal (BCD) adder. The proposed circuit has the ability to add t Design of a reversible binary coded ...

Half Adder. Half adder is a combinational circuit that performs simple addition of two binary numbers. The input variables designate the augend and addend bits; the output variables produce the sum ...

As a result, for 8, 16, 32 and 64-bit input operands, the proposed PPAS has advantage of the critical delay compared to other existing AS and also reduces the circuit area compared to AS based on ...

Adders are one of the widely used digital components in digital integrated circuit design. In this paper, various adder structures can be used to execute addition such as serial and parallel ...