The Cascade Lake chip had three UPI links, and as far as this block diagram shows, Ice Lake has three as well. ... and with a ground up redesign of the memory controller. There are a lot of tweaks, ...

Intel is not giving out block diagrams of the Ice Lake dies, of which we think there are probably four. The 10-core LCC, the 18-core HCC, the 28-core XCC, and what we are calling the 40-core UCC, ...