I’ve wanted to do a Verilog walk through ... NOT gates required to perform the function (that is, convert a four-bit binary number to a seven segment display). But it would take a few minutes.

while off-loading the graphics function from the main Processor and enhancing software developer productivity. GLEN ROCK, New Jersey, June 6, 2014 – Digital Blocks, a leading developer of Display ...

Synopsys' Discovery AMS, a mixed-signal simulator, allows designers to create entire designs with Accellera's Verilog-AMS language ... and a unified display of both analog and digital signals.